Non-volatile memory (NVM) technology has faced immense challenges in attempting to improve the writing/reading speed and injection efficiency of hot carriers into the tunneling oxide of a memory cell. Non-volatile memory (NVM) devices utilizing a channel hot electron (CHE) injection process are generally inefficient. This inefficiency results in a low writing speed and a need for a large area to adequately perform the CHE injection process. Non-volatile memory (NVM) devices utilizing a Fowler-Nordheim tunneling process are generally more efficient; however, this process has low read performance. As a result, there is a fundamental limit on the speed and scaling of conventional non-volatile memory (NVM) devices.
FIG. 1 is a diagram illustrating a cross sectional side view of a prior art non-volatile memory (NVM) device 100 programmable using the CHE process. The device 100 includes a substrate 110, an n+ source region 120 and an n+ drain region 130 formed in the substrate 110 by conventional processing methods. A floating gate 140 is formed and disposed above a channel (with a dielectric layer there between) between the source region 120 and the drain region 130. The floating gate 140 may be constructed of poly-gate, nitride, or nanocrystals, or a combination thereof, as known in the art. A control gate 150 is formed and disposed over the floating gate 140. The sides of the floating gate 140 and the sides of the control gate 150 are supported by sidewall spacer structures 160.
In the channel hot electron (CHE) process, a relatively few “lucky” electrons get injected into the tunneling oxide (disposed between the substrate 110 and the floating gate 140. The generation process is slow and the carrier injection process is indirect and inefficient. This results in a relatively slow writing/reading speed for conventional non-volatile memory (NVM) devices. The injection efficiency of the hot carriers is also relatively low. These problems limit the device scalability of such non-volatile memory (NVM) devices.
Accordingly, there is a need in the art for an improved non-volatile memory (NVM) device (and method of manufacture) having an increased writing/reading speed. There is also a need in the art for an improved non-volatile memory (NVM) device (and method of manufacture) that increases the hot carrier injection efficiency. There is also needed in the art an improved non-volatile memory (NVM) device (and method of manufacture) that decreases power consumption and enables voltage and device scaling.